Muhammad Adeel Pasha received the BSc. degree in electrical engineering from the University of Engineering and Technology, Lahore, Pakistan, in 2004, the MS degree in electrical and computer engineering from the University of Nice Sophia-Antipolis, Nice, France, in 2007, and the PhD degree in electrical and computer engineering from the University of Rennes, Rennes, France, in 2010.
Since 2011, he has been working as an Assistant Professor with the Department of Electrical Engineering, Lahore University of Management Sciences (LUMS), Lahore, Pakistan. He has several years of research and development experience and has published numerous refereed articles in major international journals and peer-reviewed conferences. His research interests include low-power microarchitecture, energy-efficient hardware design, hardware acceleration of machine learning and deep neural networks, and futuristic computing platforms for green computing and communications.
| Title | Publication | Author | Year |
|---|---|---|---|
| Exploring Memory Access Techniques for Efficient FPGA based 3D CNN Accelerator Design | 2024 IEEE 6th International Conference on AI Circuits and Systems, AICAS 2024 - Proceedings | 2024 | |
| Hardware-friendly tone-mapping operator design and implementation for real-time embedded vision applications | Computers and Electrical Engineering | 2023 | |
| ReDiSto: A Resource-Efficient and Accurate Divider Circuit for Stochastic Computing | ICECS 2023 - 2023 30th IEEE International Conference on Electronics, Circuits and Systems: Technosapiens for Saving Humanity | 2023 | |
| NS-3 Based Open-Source Implementation of MQTT Protocol for Smart Building IoT Applications | 2023 3rd International Conference on Communication, Computing and Digital Systems, C-CODE 2023 | 2023 | |
| FPGA Based Intelligent Hardware Trojan Design and its SoC Implementation | ICECS 2023 - 2023 30th IEEE International Conference on Electronics, Circuits and Systems: Technosapiens for Saving Humanity | 2023 | |
| FPGA Design of a Reconfigurable UART IP Core and its SoC Implementation for IoT Applications | 2023 25th International Multi Topic Conference, INMIC 2023 - Proceedings | 2023 | |
| Towards designing a hardware accelerator for 3D convolutional neural networks | Computers and Electrical Engineering | 2023 | |
| FPGA Implementation of IEEE 1588 Protocol for Bluetooth-based Distributed Wireless Systems | ICECS 2022 - 29th IEEE International Conference on Electronics, Circuits and Systems, Proceedings | 2022 | |
| Effects of Conventional UPS vs Smart Energy Metering Solution on Harmonics and Grid Stability for Low Voltage Consumers in Developing Countries: A Case Study of Pakistan | ISC2 2022 - 8th IEEE International Smart Cities Conference | 2022 | |
| Design and FPGA based Implementation of IEEE 1588 Precision Time Protocol for Synchronisation in Distributed IoT Applications | Australian Journal of Electrical and Electronics Engineering | 2022 | |
| Energy-Efficient Cache-Aware Scheduling on Heterogeneous Multicore Systems | IEEE Transactions on Parallel and Distributed Systems | 2022 | |
| Variable Length Quantization based Design of Polar Codes Decoder for Resource-Limited IoT Devices | ICECS 2022 - 29th IEEE International Conference on Electronics, Circuits and Systems, Proceedings | 2022 | |
| ModuloNET: Neural Networks Meet Modular Arithmetic for Efficient Hardware Masking | IACR Transactions on Cryptographic Hardware and Embedded Systems | 2021 | |
| Advancements in microprocessor architecture for ubiquitous ai???an overview on history, evolution, and upcoming challenges in ai implementation | Micromachines | 2021 | |
| A Volunteer-Supported Fog Computing Environment for Delay-Sensitive IoT Applications | IEEE Internet of Things Journal | 2021 | |
| IoT-enabled Smart Energy Metering Solution with Soft-UPS for Developing Countries | Proceedings of the 11th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications, IDAACS 2021 | 2021 | |
| Optimizing Hardware Accelerated General Matrix-Matrix Multiplication for CNNs on FPGAs | IEEE Transactions on Circuits and Systems II: Express Briefs | 2020 | |
| Energy-efficient Real-time Scheduling on Multicores: A Novel Approach to Model Cache Contention | ACM Transactions on Embedded Computing Systems | 2020 | |
| An Optimized Hardware/Software Co-Design Framework for Real-Time Pedestrian Detection | 2nd International Conference on Electrical, Communication and Computer Engineering, ICECCE 2020 | 2020 | |
| FFConv: An FPGA-based accelerator for fast convolution layers in convolutional neural networks | ACM Transactions on Embedded Computing Systems | 2020 | |
| A hybrid instruction and functional level energy estimation framework for embedded processors | Proceedings - IEEE International Symposium on Circuits and Systems | 2020 | |
| Accelerating tiny YOLO v3 using FPGA-based hardware/Software Co-Design | Proceedings - IEEE International Symposium on Circuits and Systems | 2020 | |
| An improved model for system-level energy minimization on real-time systems | Proceedings - IEEE Computer Society's Annual International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunications Systems, MASCOTS | 2019 | |
| Multi-hop routing implementation in spatially distributed wireless sensor networks for large-scale environmental monitoring applications | Proceedings of the 2019 10th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications, IDAACS 2019 | 2019 | |
| A framework for high-level simulation and optimization of fine-grained reconfigurable architectures | Simulation | 2019 |